# Bunnie Huang's Baochip-1x brings open 22nm RISC-V SoC to high-assurance computing

> **Key takeaway:** The Baochip-1x is a 22nm fabricated RISC-V SoC with open SystemVerilog/Verilog sources, 4 MB RRAM, 2 MB SRAM, and security features targeting verifiable high-assurance systems.

**Published:** 2026-11-12T19:30:16+00:00 
**Source:** Hackaday Hardware 
**Category:** open-hardware 
**Canonical URL:** https://fosswire.org/news/bunnie-huangs-baochip-1x-brings-open-22nm-risc-v-soc-to-high.html 

## Summary
Andrew "Bunnie" Huang has produced the Baochip-1x, a 22nm system-on-chip designed for high-assurance computing applications where hardware verification is critical. The SoC derives from the FPGA-based CPU in Huang's earlier Precursor secure communicator device, translating that verifiable design into silicon with a single-core 350 MHz VexRISC-V implementation supporting the RV32IMAC instruction set. The chip includes 4 MB of resistive RAM and 2 MB of SRAM, along with extensive security features, and is available both as a DIY assembly project and as the "Dabao" evaluation board in a Raspberry Pi Pico-compatible form factor.

The design sources are openly available, including SystemVerilog and Verilog HDL, and the presence of an MMU enables running standard software targeting RV32IMAC. A Coder's Guide accompanies the release for developers working with the platform. This represents a rare example of a mostly-open, fabricated SoC targeting security-conscious applications rather than general-purpose consumer workloads.

## Architecture and openness of the Baochip-1x
- **Core and ISA:** Single-core VexRISC-V processor running at 350 MHz with RV32IMAC instruction set support, including the memory management unit required for full operating system execution.
- **Memory hierarchy:** 4 MB of on-die resistive RAM (RRAM) for non-volatile storage and 2 MB of SRAM for volatile working memory, both integrated in the 22nm fabrication.
- **Design sources:** Complete SystemVerilog and Verilog source code is published, enabling gate-level inspection and verification of the hardware implementation.
- **Security features:** Dedicated security subsystem incorporated into the SoC design, building on the "fully verifiable communicator" approach established with the Precursor device.
- **Form factors:** Available as bare die for DIY assembly or pre-mounted on the "Dabao" evaluation board with Raspberry Pi Pico-compatible pinout and footprint.

## Why it matters
The Baochip-1x addresses a persistent gap in open hardware: a fabricated, inspectable SoC suitable for applications requiring supply-chain verification and hardware trust. For security researchers, auditors, and developers of critical systems, having open HDL sources for a 22nm part provides a foundation for auditable computing that closed-source microcontrollers cannot match. The RV32IMAC compatibility and MMU also mean the device can leverage existing RISC-V toolchains and potentially mainline or real-time operating systems, reducing the barrier to adoption for teams already working with open RISC-V platforms.