# STMicro launches STM32G5 280 MHz Cortex-M33 MCU for digital power and motor control

> **Key takeaway:** STMicroelectronics' new STM32G5 series doubles the performance of its 2021 predecessor with a 280 MHz Cortex-M33 core, integrated mathematical accelerators, and post-quantum cryptography support targeting industrial power conversion and robotics applications.

**Published:** 2026-11-10T00:00:33+00:00 
**Source:** CNX Software 
**Category:** open-hardware 
**Canonical URL:** https://fosswire.org/news/stmicro-launches-stm32g5-280-mhz-cortex-m33-mcu-for-digital-.html 

## Summary
STMicroelectronics has introduced the STM32G5 series, a family of 280 MHz Arm Cortex-M33 mixed-signal microcontrollers designed for demanding industrial applications including power supplies, photovoltaic inverters, EV chargers, and motor control systems. The new parts deliver roughly twice the performance of the STM32G4 series from 2021, achieving 1,136 CoreMark and 420 DMIPS while adding substantial on-chip integration for real-time control workloads.

The series splits into two main lines: the STM32G5x3 without high-resolution timer, and the STM32G5x4 with HRTIM. Both offer up to 512 KB dual-bank flash and 112 KB ECC-protected SRAM. ST provides a complete development ecosystem including STM32CubeG5 firmware, STM32CubeIDE, and specialized motor-control and digital-power SDKs, alongside three reference boards including the NUCLEO-G564RE and application-specific Discovery kits.

## Architecture and peripheral integration
- **Core and memory hierarchy:** 280 MHz Cortex-M33 with TrustZone, 8 KB instruction cache, 4 KB data cache (G55x/56x only), and 20-32 KB CCM-SRAM routine booster; up to 512 KB dual-bank flash with read-while-write and ECC-protected SRAM up to 112 KB.
- **High-resolution timing:** 111 ps resolution HRTIM with up to 12 PWM outputs on G5x4 variants, paired with up to three 16-bit advanced motor-control timers for precise power-stage and motion control.
- **Mathematical acceleration:** Dedicated CORDIC unit for trigonometric operations and up to two FMAC (Filter Mathematical Accelerator) units for digital filtering, reducing CPU load in control-loop algorithms.
- **Analog front-end:** Up to three 12-bit ADCs at 5 MSPS with hardware oversampling, eight 12-bit DAC channels, eight sub-20-ns analog comparators, and three operational amplifiers with PGA on higher-end variants.
- **Security and longevity:** Arm TrustZone with secure boot, ST immutable Root of Trust, AES/PKA/HASH acceleration, on-the-fly external memory decryption, and post-quantum cryptography software library support; SESIP Level 3 and PSA Certified Level 3 in progress.

## Why it matters
The STM32G5 strengthens the open-hardware toolchain landscape around STM32Cube and Zephyr RTOS by providing a higher-performance anchor for digital power and robotics projects that previously required discrete DSPs or FPGAs. For Linux-adjacent embedded developers, the extensive timer and analog integration reduces BOM complexity in motor drives and power converters, while the post-quantum cryptography support future-proofs industrial designs against emerging threats without hardware redesign.