The FPGA Chronicles: Ready to Probe
In the last few installments, we looked at using the Tang Nano 20K with both the GOWIN tools and some open-source tools .
Executive Summary
In the last few installments, we looked at using the Tang Nano 20K with both the GOWIN tools and some open-source tools . The open-source tools certainly had the advantage of letting you simulate and debug your design before sending it to the actual chip. However, as we’ll see, the GOWIN tools include a very easy-to-use, capable logic analyzer. Setup First, you’ll need a GAO config file.
Open Silicon & Gate-Level Hardware Inspection
From a silicon and hardware engineering viewpoint: - **Interface Neutrality:** Mitigates dependency on proprietary BSPs, empowering open toolchains to address hardware directly. - **Supply Chain Verification:** Schematics and open pinouts allow deterministic audits against silicon errata. - **Lifecycle Decoupling:** Decouples physical hardware utility from commercial vendor end-of-life obsolescence.
Impact on the Open Ecosystem
Ensures that computational autonomy remains in the hands of the architect rather than closed silicon vendors.