MLIR gains static memory planner to eliminate heap allocations

Brief written by the FOSSWire AI editor from LLVM How we write

October 19, 2026 1 min read 6 reads

Key Takeaway

A Google Summer of Code 2026 project merged into LLVM's MLIR replaces multiple heap allocations with a single compile-time-sized arena, targeting embedded CPUs, DSPs, and custom accelerators where dynamic allocation is prohibited or expensive.

Summary

Krish Gupta's GSoC 2026 work under the LLVM Foundation introduced a static-memory-planner pass for MLIR that coalesces memref.alloc operations into a single memref<Nxi8> arena with memref.view slices. The pass uses BufferViewFlowAnalysis to track buffer lifetimes through control flow including arith.select, scf.if, scf.for, and cf branches. Two allocation algorithms are available: trivial sequential packing and a best-fit planner that reuses arena space for non-overlapping lifetimes. The feature landed across three upstream PRs (#205125, #209106, #213634) between June and August 2026.

How the planner transforms MLIR bufferization

Six-step pipeline: collect candidates via alias analysis, build (size, alignment, timeStart, timeEnd) descriptors in O(n+m), run planner algorithm, assign byte offsets, create single arena allocation, rewrite allocs to views and erase deallocs
Two arena modes: allocate creates the arena inside the function; arg receives it as a function parameter for external memory management
Two planner algorithms: trivialMemoryPlanner for sequential packing; bestFitMemoryPlanner for lifetime-aware slot reuse
BufferViewFlowAnalysis integration: unified alias analysis replacing hand-rolled DFS, handling arith.select, scf.if/scf.for results, cf branches, and view ops through BufferViewFlowOpInterface, RegionBranchOpInterface, BranchOpInterface, and ViewLikeOpInterface
Reverse-alias safety guard: prevents dealloc erasure when a dealloc may free both arena-managed and non-arena-managed allocations, using resolveReverse() to trace all possible source allocs
Lifetime anchoring: deallocs nested in scf.if bodies use findAncestorOpInBlock to conservatively extend timeEnd to the enclosing op's block index

Why it matters

The pass directly benefits downstream MLIR-based compiler pipelines targeting edge and accelerator deployments where heap allocation is unavailable or performance-prohibitive, including TensorFlow Lite, IREE, and custom DSP toolchains.

Original reference: blog.llvm.org →