Open Hardware & RISC-V

Waveshare ESP32-S31-Zero ships with 32MB PSRAM, RISC-V WiFi 6 and Linux support path

Key Takeaway

Waveshare's compact ESP32-S31-Zero board brings a 320 MHz dual-core RISC-V MCU with WiFi 6, Bluetooth 5.4, and 802.15.4 to a 28 x 18 mm form factor with up to 32MB PSRAM and 32MB flash, while exposing enough I/O through a 40-pin connector to potentially enable Gigabit Ethernet expansion and early Linux applications.

Summary

Waveshare has released the ESP32-S31-Zero, a compact development board built around Espressif's ESP32-S31 dual-core RISC-V microcontroller. The board follows Waveshare's established "Zero" form factor at 28 x 18 mm, adding a more powerful SoC with a high-performance RV32IMAFCP core running at 320 MHz alongside a low-power RISC-V core, plus wireless capabilities spanning 2.4 GHz WiFi 6, Bluetooth 5.4 with LE Audio and Mesh 1.1, and 802.15.4 for Zigbee, Thread, and Matter.

Memory configurations scale up to 32MB of on-chip PSRAM and 32MB of SPI flash, with eighteen castellated holes for basic GPIO and power, plus a 40-pin board-to-board connector that exposes additional interfaces including RGB LCD, touchscreen, SD card, and USB 2.0. Notably, the GPIO8-GPIO19 pins available on that connector overlap with the ESP32-S31's EMAC RGMII interface, opening the possibility of Gigabit Ethernet expansion boards. The board currently ships as the ESP32-S31-Zero-N32R16 variant with 32MB PSRAM and 16MB flash for approximately $11-19 depending on retailer.

ESP32-S31-Zero hardware architecture and expansion potential

  • SoC and CPU cores: Espressif ESP32-S31 with dual-core RISC-V: one high-performance RV32IMAFCP core at 320 MHz with FPU and SIMD, plus a dedicated low-power RISC-V core for sleep-state tasks.
  • Memory hierarchy: 512 KB SRAM, 32 KB low-power SRAM, and up to 32MB PSRAM; storage via 16MB or 32MB SPI flash chip, with current retail variant offering 32MB PSRAM and 16MB flash.
  • Wireless stack: 2.4 GHz 802.11ax WiFi 6, Bluetooth 5.4 with LE Audio, direction finding, Bluetooth Mesh 1.1, and Classic BR/EDR; 802.15.4 radio for Zigbee, Thread, and Matter protocols.
  • I/O expansion: 2x 9-pin headers with 15 GPIOs, UART, 6x ADC, power rails; 40-pin B2B connector carrying RGB LCD, touchscreen, SD card, USB 2.0, and additional GPIOs including EMAC RGMII-capable pins.
  • Power and physical: 5V USB-C or Vin input through MP1605GTF-Z 3.3V step-down DC-DC converter; 28 x 18 mm footprint with castellated edges for surface-mount integration; WS2812 RGB LED and IPEX 4 antenna connector alongside ceramic antenna.

Why it matters

The ESP32-S31-Zero arrives as initial Linux support for the ESP32-S31 is already emerging, giving developers a compact, low-cost platform to experiment with mainline Linux on RISC-V microcontrollers rather than proprietary RTOS environments. Its 40-pin connector's exposure of EMAC RGMII pins creates a hardware path toward community-designed Ethernet expansion boards, potentially yielding sub-$20 IoT gateways with WiFi 6, Thread, and Gigabit wired connectivity. For the open hardware ecosystem, Waveshare's publication of PDF schematics and ESP-IDF sample code provides a reference point, though full open-source hardware files remain to be evaluated against projects like BreadBee that have pursued similar Ethernet-enablement strategies.

Original reference: www.cnx-software.com →