AT&T UNIX PC recreated as open-source FPGA core for MiSTer

Developer Hrvoje Cavrak has released an open-source FPGA recreation of the 1985 AT&T UNIX PC, a 10 MHz Motorola 68010 workstation that originally shipped with up to 4 MB of RAM. The softcore targets the MiSTer project ecosystem, meaning it synthesizes for any MiSTer-compatible FPGA board including the Terasic DE10-Nano with its Intel Cyclone V SoC.

The implementation requires an SDRAM add-on board for the DE10-Nano because the FPGA fabric side of the Cyclone V only exposes a fraction of the 4 MB needed by the softcore. The project mixes SystemVerilog, Verilog, and VHDL components, and some portions were developed with assistance from LLM coding tools. Users must source their own AT&T UNIX boot ROM and disk images, which remain under copyright.

FPGA implementation and hardware requirements

• CPU core: Softcore recreation of the 10 MHz Motorola 68010 processor, the original UNIX PC's CPU.
• Memory architecture: Requires 4 MB of SDRAM, necessitating an SDRAM add-on board on the DE10-Nano since the Cyclone V FPGA side lacks sufficient onboard memory.
• HDL sources: Implementation spans three hardware description languages: SystemVerilog, Verilog, and VHDL.
• Target platform: Built for the MiSTer project, ensuring portability across MiSTer-compatible FPGA systems beyond just the DE10-Nano.
• Development method: Portions of the codebase were written and validated using LLM coding chatbots, with the author noting it remains a 'works on my MiSTer board' project.

Why it matters

This project preserves a historically significant but rare UNIX workstation in open-source HDL, contributing to the growing MiSTer ecosystem of retro computing FPGA cores. For open hardware enthusiasts and preservationists, it offers accessible entry to a machine that has become financially unobtainable, though the copyright status of required ROM and disk images remains a practical barrier to immediate use.